Non-return-to-zero (NRZ) signaling refers to an encoding scheme in which there is no return to a reference voltage between encoded bits. Instead, the signaling remains at a “high” voltage for consecutive “ones” and remains at a “low” voltage for consecutive “zeros.” Additionally, NRZ communication systems embed the clock in the data. Thus, in data transmission systems that utilize NRZ signaling, it is necessary to recover the clock based on the timing of the data transitions in a data stream.
A commonly utilized method for recovering the embedded clock is to implement a circuit that generates an impulse whenever there is a data transition. Circuit 100 of FIG. 1 implements this common method. Circuit 100 receives data at splitter 101. Splitter 101 provides two separate circuit paths to exclusive-OR (XOR) gate 103. In one of the circuit paths, delay element 102 provides a one-half unit interval (UI) delay, where the “unit interval” is defined as the time elapsed during one bit or symbol. By delaying the data provided to XOR gate 103, circuit 100 will produce a pulse whenever there is a data transition (from “zero” to “one” or vice versa). The pulses will contain a spectral component at the clock frequency that can be filtered by band-pass filter 104 to recover the embedded clock. Circuit 100 is associated with a number of disadvantages. First, circuit 100 requires logic technology that can switch in less time than one-half of a unit interval. Secondly, XOR gate 103 and an optional preceding limiter (not shown) may add jitter to the recovered clock.
The use of a clock recovery circuit that adds jitter to the recovered clock can be problematic for a number of applications. Specifically, most data transmission systems impose a performance criteria for jitter. In order to make a jitter measurement for a data transmission system to verify the performance of the system, the clock is first recovered from communicated data and, then, the jitter of the recovered clock is measured using conventional jitter measurement techniques. If the clock recovery circuit adds jitter, then there is an error floor imposed on any jitter measurements that utilize the clock recovery circuit.